Sentence examples for memory requirements compared from inspiring English sources

The developed scheduling algorithm results in reduced memory requirements compared with existing architectures.

In a vehicle traffic network example, we synthesize an intersection signal controller while dramatically reducing runtime and memory requirements compared to previous approaches.

An upward and downward traversal of the tree yields significant performance improvements for both the speed and memory requirements, compared to the current state-of-the-art recursive methods for NEGF.

The proposed algorithm is tailored to inexpensive hardware and significantly reduces both the running time and memory requirements compared to the existing algorithms, while substantially improving the classification accuracy.

The string excitation signal model is physically inspired and represents a cheap solution in terms of both computational resources and especially memory requirements (compared, e.g., to sample playback systems).

We also showed that ITKrMM provides significant improvements in terms of dictionary quality and consistency compared to BPFA and in terms of computation cost/time (e.g. 18 min vs. 3.5 h) and memory requirements compared to wKSVD, a state-of-the-art algorithm for dictionary learning/refinement in the presence of erasures.

We take advantage of the mesh structure on a block-by-block basis to implement these numerical operators efficiently, and achieve computational speed with modest memory requirements when compared to explicit sparse matrix storage.

The whole process is automatic, is fast, has moderate CPU and memory requirements, and compares favorably to other existing techniques.

LIDE method allows reducing the memory requirement significantly compared to AHE.

By using SMQ, we achieve both a lower computational complexity for the codebook production and a lower memory requirement, as compared to a nonsplit MQ.

Further, the clear reduction of computing time and memory requirements of inexact solvers compared to sparse direct ones makes possible to scale far beyond state-of-the-art BDDC implementations.