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The heterogeneous integration on LSI using the wafer level transfer with adhesives is reviewed.
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Using the wafer substrate and the glop-top dispensing technique, wafer level LED packaging incorporated with a moldless encapsulation process is realized.
The wafer level transfer using the adhesive bonding has been studied in KTH in Sweden [5].
Thinned bulk PZT exhibits high power and a useable voltage while maintaining a low optimal resistive load, demonstrating the potential of high performance piezoelectric MEMS energy harvesters using bulk PZT sheets fabricated at the wafer level.
The wafer level integration by the adhesive bonding was used in the past.
In addition, the fabrication process is compatible with the traditional microfabrication technology and has a high potential to be used in the wafer-level fabrication in the future.
Many researches have been devoted to the study of the electrical characteristics of high-k gate dielectrics, mainly using standard wafer level characterization techniques on fully processed MOS capacitors or transistors [1 4].
The 3D scheme combined with sealing bonding techniques by using sealing wafer level packaging of micro electro mechanical system (MEMS) component is successfully achieved, such as SAW RF Filter, silicon MEMS oscillators, and image sensor devices [18 22].
It demonstrates that the micro-machined Pirani gauge has great potential to be used in wafer level vacuum packaging.
The wafer-level fabrication of a Michelson interferometer using optical MEMS technologies is presented.
During the wafer-level test, an individual chip is tested by using a probe card with micro-probes.
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