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In this study, we mainly focus on the evaluation of sketch-based network measurement using a multicore platform supported by Intel DPDK, a fast packet I/O library.
Given the requirement of a speed-up of 2 × for 50 nodes by using a multicore platform based on LEON3 and OpenMP, the proposed flow has been applied.
The initial value of response time for the application on single LEON3 core was 8394 ms. Supposing a speed-up of 3 × is required, by using a multicore platform based on LEON3 and OpenMP, the proposed flow has been applied.
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This paper presents a resource-efficient time-division multiplexing network interface of a network-on-chip intended for use in a multicore platform for hard real-time systems.
Aldinucci et al. [9] presented a porting of a decision tree algorithm implementation to a multicore platform using FastFlow [10].
In conclusion, VIPPE can be used to analyze the correctness of the target application while executed on a multicore platform, to make a design space exploration with respect to architectural parameters, and to evaluate the impact of different choices in the use of OpenMP.
Because most programming techniques rely on system services, bare-metal programming requires a different way of implementing code on a multicore platform.
In order to obtain a multicore platform, other LEON3 processors can be connected to the AHB, acting as multi-masters.
Then, the flow allows the designer to realize such a multicore platform on FPGA by providing also an SMP Linux with OpenMP support.
As pointed out in [28], the operating speed of a processing unit on a multicore platform is approximately proportional to its operating clock frequency, {speed} propto f, (7).
The objective of this paper is to introduce the factorial design methodology applied to the experimental performance evaluation of PEAs executed on a multicore platform.
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