Sentence examples for trigger architecture from inspiring English sources
The MAGIC trigger architecture and its implementation is presented.
The experimental conditions, the trigger architecture, its principle and its performance predicted by simulation are presented.
This talk will describe the trigger architecture focusing on key design aspects that allow the use of commercially available technology in a highly feasible and practical solution that meets the demanding physics requirements of the BTeV experiment.
A new Level-1 trigger architecture with improved performance has been installed and is now used to maintain the thresholds used in LHC Run-1 in the more challenging conditions experienced during Run-2.
The earliest hardware-based ATLAS trigger stage ("Level 1") will have to provide a higher rejection factor in a more difficult environment: a new improved Level 1 trigger architecture is under study, which includes the possibility of extracting with low latency and high accuracy tracking information in time for the decision taking process.
The method was developed during the solution of the EU/IST project FIT - Fault Injection for Time Triggered Architecture (TTA).
The Time-Triggered Protocol TTP/C constitutes the core of the communication level of the Time-Triggered Architecture for dependable real-time systems.
A fully programmable vertex shader based on Transport Triggered Architecture (TTA) is proposed in this paper to provide high efficiency of performance and connectivity for embedded applications.
The accelerator is a Transport Triggered Architecture (TTA) Application-Specific Instruction-Set Processor (ASIP) targeted for running various Machine Learning algorithms.
Experimental results validate a many-core platform built by an array of Transport Triggered Architecture processors for exploring the partitioning search space based on the execution trace analysis.
Second, we present a technique to abstract a communication bus designed for GALS, the Loosely Time-Triggered Architecture (LTTA) bus, to a finite FIFO channel.
