Sentence examples for to thin down from inspiring English sources

But in terms of a broad, varied range of books, widely available in a dedicated bookshop – well, Borders has gone, and Waterstone's (which has already announced it is losing 20 shops this year) could well have to thin down even further.

While the proposal to merge the island's three elected bodies into one would indeed have brought a bit more autonomy over matters such as the environment and tourism it was also an effort by the government to thin down Corsica's bloated bureaucracy and boost private investment.

Etch Nafion with argon and oxygen plasmas to thin down the passive regions.

Many post-processing methods, such as heating and pressing, have been proposed to thin down the PVP layer.

He tossed in a suggestion explaining how other companies were able to thin down a roof beam to allow for angled windows.

Coin, a YC-backed company looking to thin down your wallet, is currently in the process of raising around $15 million in Series A funding, according to multiple sources familiar with the matter.

One of the two tiers, which are face-to-face bonded, has to be thinned down to about 12μm to expose the through silicon vias connecting the circuits to the back-metal bond pads.

The development of highly resistive ZnO film may open the possibility to thinning down the switching layer and lowering the current operation; fabrication of ultra-thin and low power device is the major challenge in this oxide system.

Makes 2 small cups best-quality cocoa powder 2 tsp whole milk 300ml pasilla chilli flakes 1 tsp or a tiny sprinkle of cayenne pepper brown sugar 1 tsp dark chocolate (70% cocoa solids) 40g, roughly chopped cinnamon a pinch Mix the cocoa powder into a smooth paste with a tablespoon of milk, then add another tablespoon to thin it down a little more.

Those surface ices feed a wispy nitrogen atmosphere, sublimating to bulk it up or frosting out to thin it down - all depending on where Pluto is in its orbit around the Sun.

This new 3D design relies upon stacking two homogeneous tiers fabricated in a 130 nm CMOS process where the top tier is thinned down to about 12μm to expose through silicon vias (TSV), therefore making connection to the buried circuits possible.