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Total chip power consumption is less than 9.1 mW within the output buffer.
The output buffer is a class AB miller operational amplifier, with special non-linear current boost.
The output buffer provides rail-to-rail output swings for improving the dynamic range of the ASIC preamplifier.
The output buffer at the sender works as a sliding window, which can span more than one AW.
The output buffer with the RC-feedback topology can improve the gain, increase the IIP3, restrain the noise, improve the noise figure and decrease the DC power dissipation.
The EROIC chip comprises also the peak stretcher, the peak detector, the output buffer to drive the external ADC and the pile-up rejection system.
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The output buffers allow the three modules to work in parallel, improving the performances.
The three architectures for the output buffers, so different when the quality factor is maximum (when quantization is not used), rapidly become equivalent decreasing it.
The allocation of the decoders to the input buffers can be achieved by changing the connectivities between the input buffers and the decoders and those between the decoders and the output buffers.
Current MPEG encoders implement feedback laws which usually take into account the state of the encoder output buffer to provide a constant output bit rate.
The inverting output buffer stage of the CFA together with current-mirror-based driving of the power pass transistor results in high PSRR.
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Justyna Jupowicz-Kozak
CEO of Professional Science Editing for Scientists @ prosciediting.com