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Exact(12)
This model, called shared control, shares the control unit(s) at the instruction level.
The instruction level power models are derived based on the power supply current measurement technique.
We propose a new computer architecture supporting a redundant number computation at the instruction level.
There is a tradeoff between efficiency and flexibility at the instruction level.
Simulation results show that the mechanism is efficient at the instruction level for the basic DSP/IMG library by improving performance by 35% on average.
Examples with power reduction of up to 40%, obtained by rewriting code using the information provided by the instruction level power model, illustrate the potential of this idea.
Similar(48)
The latter refers to the instruction-level simulators of the nodes' microcontrollers or operating system emulators.
Current microprocessors utilise the instruction-level parallelism by a deep processor pipeline and the superscalar instruction issue technique.
VLSI technology offers several solutions for aggressive exploitation of the instruction-level parallelism in future generations of microprocessors.
The power consumption evaluation of the embedded systems is very slow procedure using the instruction-level power models into the simulator.
The parallel CPU version employs similar parallelization strategies, but differs with respect to the instruction-level parallelism that used auto-vectorization.
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Justyna Jupowicz-Kozak
CEO of Professional Science Editing for Scientists @ prosciediting.com