Sentence examples for the instruction data from inspiring English sources

Compared to the existing state-of-the-art multiway partial bus-invert (MPBI) coding which relies on data bit correlation, our approach is very effective in reducing the switching activity of the instruction data buses, since little bit correlation can be observed in the instruction data.

The presentation of the instructions, data acquisition, and data storage were computer-controlled.

To see John talk about this for herself, and to see part of her leadership team -- the principals of the schools in Pass Christian -- talk about curriculum, instruction, data, and the need to work together as a team, you can view the playback here.

However, the instruction and data buses share the same memory space.

The larger the cache, the faster the performance, since there is a greater chance that the instruction or data required next is already in the cache.

This paper presents a bus coding methodology for the instruction memory data bus switching reduction.

This method (TC-HyOM) aggregates two different approaches for each branch of the hierarchy, namely, the instruction and data branches.

By means of this study it was possible to choose a suitable heuristic for the instruction and data branches.

The size of the instruction and data cache was set to 4 KB, and the MIPS frequency was set at 50 MHz.

In this figure, we modeled the estimators for the MIPS processor, the instruction and data caches, the shared memory, and the interconnect.

Then, we apply our approach, ReVS, for the instruction and data caches and obtain the number of runs required to pass the validation step R ′.