Sentence examples for synchronous counter from inspiring English sources

Proposed TDC is based on a synchronous counter and an asynchronous fine interpolator.

The ASIC has been designed in CMOS 0.8 μm technology and it is based on a current-to-frequency converter followed by a synchronous counter.

Regarding the generated pulse signal as rising/falling edge of the clock signal with base frequency, a genetic synchronous counter circuit based on the topology of digital sequential logic circuit is triggered by a pulse wave form to synthesize a clock signal with the inverse multiple frequency to the genetic oscillator.

Race problems and dynamic hazards can be overcome by using synchronous counters, also called "parallel" counters.

Previous QCA synchronous counters (QSCs) have been designed and simulated using two methods.

In this paper, a robust and efficient QCA design of synchronous counters is proposed.

This circuit functions as the chief element for constructing synchronous counters.

Synchronous counters are designed with several different bit sizes and simulation results demonstrate the validity of them.

Synchronous counters are designed to switch the bistables at the same moment, so the accumulated current burst can be severe.

In this study a low complexity and energy-efficient QCA T flip flip as well as high-performance single-layer synchronous counters are proposed.

The main difference in the design of synchronous counters is that the original clock pulses are taken to all bistables, not just the first.