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Figure 1 Nanostructure substrate fabrication process.
The total solution from substrate fabrication to package verification had been studied.
The substrate fabrication conditions were firstly optimized to obtain the maximal SERS enhancement.
However, there are still open challenges, mainly related to the reproducibility of the methods for substrate fabrication.
For patterned substrate fabrication, a 235-nm-thick SiO2 film was formed by thermal oxidation on a Si (001) substrate.
With Ag mesh patterned as catalyst on silicon substrate, fabrication of vertical (100) SiNW arrays with controlled morphologies were achieved, as shown in Figure 4.
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For substrates fabrication, we exploited a method discussed elsewhere[16, 17].
The program consists of three general tasks, aimed at: SiC bulk and substrate material fabrication, SiC device manufacturing and SiC device applications, respectively.
These were believed to occur during the preparation of the substrate or fabrication process.
Since the deposition is directly performed on the desired substrate, our fabrication processes are performed directly on the specimen.
These heaters and sensors were then moved to a low thermal conductivity epoxy-glass substrate for fabrication of the channel.
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