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In each simulation cycle, Candence PSPICE 16.5 was called from Matlab to simulate the network with results being collected and analyzed utilizing Matlab.
Each simulation cycle consisted of two phases: data generation and analysis of the simulated data sets.
The final phase of the modelling and simulation cycle is the evaluation phase.
A typical simulation cycle of the hybrid simulation goes as follows.
It schedules events and updates the states of modules every simulation cycle.
Therefore, fast and accurate circuit simulation algorithms are needed to accelerate the simulation cycle.
In fact, using the D* Lite, each simulation cycle was approximately half the cycle time of the Space D*.
In this section the modelling and simulation cycle is applied to a concrete example: the bystander effect.
Besides, parts of the PrEVs are set to have no-trip or long-distance trips in each simulation cycle.
Notably, the hardware simulation cycle time is the same no matter where the software test benches are executed in.
Signals are only updated at the beginning of a simulation cycle and are not updated immediately after execution.
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