Floating-point numbers in a computer are partially logarithmic (the exponent part), and one can even use an entirely logarithmic fixed-point number system.
The fixed-point number system is of widespread interest in the FPGA community because of the highly efficient arithmetic implementations possible when compared to what can be achieved with floating-point arithmetic.
Contents of Part 1 include knowledge review, DSP fundamentals, processor architectures, real-time systems, and design of embedded systems, numerical representation and precision control of fixed-point number systems in fixed-point processors, review of ASIP and DSP architectures for different requirements and applications, and introduction to design methodologies for ASIP and DSP firmware.
Authors: Muller, J.-M., Brunie, N., de Dinechin, F., Jeannerod, C.-P., Joldes, M., Lefèvre, V., Melquiond, G., Revol, N., Torres, S. This handbook is a definitive guide to the effective use of modern floating-point arithmetic, which has considerably evolved, from the frequently inconsistent floating-point number systems of early computing to the recent IEEE 754-2008 standard.
Since all the processing units and connections on the FPGA are reconfigurable, we can use different number representations, such as fixed-point, floating-point, logarithmic number system (LNS), residue number system (RNS), and so forth, with different bit-width settings.
There are existing FPGA applications using fixed-point, floating-point, and logarithmic number system (LNS) [12].
In the reverse factorial number system (using bases 2!,3!,4!,... for positions after the decimal point), 1 = 1.000... = 0.1234..
So that's point number one.
"Point Number 13: boring, boring, boring.
"That's point number one.
