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6.896 Theory of Parallel Hardware (SMA 5511).
Translating network models to parallel hardware in NEURON.
Hines, M.L. and Carnevale, N.T. Translating network models to parallel hardware in NEURON.
This explicitness provides opportunities to improve run-time performance on parallel hardware.
K. Asanović, "Transactors for parallel hardware and software co-design (Invited Paper)," in Proc.
"Translating network models to parallel hardware in NEURON" by Hines and Carnevale.
One approach to speeding up the unification operation is to perform it on parallel hardware.
Would defer purchase of specialized parallel hardware until if and when it becomes absolutely necessary.
I've tried testing it on the networks from "Translating network models to parallel hardware in NEURON".
Problem: I want to use parallel hardware to handle large models or speed up simulations.
6.896 covers mathematical foundations of parallel hardware, from computer arithmetic to physical design, focusing on algorithmic underpinnings.
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