Sentence examples for parallel error from inspiring English sources
It may be that left-leaning journalists make a parallel error, then: They may enjoy Jon Stewart's program, but recognise him as an entertainer, not a serious political leader whose views represent any broader movement.
A global parallel error re-distribution algorithm is developed, with no negative effects on the L1 error convergence and computational costs.
These higher data rates are in fact due to the use of VSF-OFCDM (variable spreading factor orthogonal frequency and code division multiplexing) and VSF-CDMA (variable spreading factor code division multiple access) as access schemes and also efficient concatenated (serial and parallel) error correction codes.
Obtaining the specific numerical value to use as a fixed measurement error variance is often assisted by the researcher making their assessments as percents of the indicator's variance that are likely to originate in the various potential causal sources of the indicator (the things paralleling error-5, or error-C, etc. in Figure 3).
It might be predicted that morphology errors would parallel syntax errors because they work together to form the grammatical system.
The linear regression lines for both phases of the reaction are parallel (within error) and the regression line for the faster phase was shifted to more positive values.
A distance of 3.5 m was chosen to minimize parallel axis error.
All data is from cultures grown in parallel, with error bars depicting the standard deviation of duplicate cultures Previous reports have suggested that the use of bioreactors enables higher cell density and greater isoprenoid yields (Newman et al. 2006).
We will shortly make much more use of the technology that can send and receive millions of messages, in parallel, with zero error.
In general, multiple slices are widely used for larger sequences due to parallel processing and error resilience.
A parallel SER (soft error rate) evaluation framework ASSET-VLG was developed to analyze the SER of both combinational and sequential standard cell circuits.
