Sentence examples for multiple instruction issue from inspiring English sources

Current superscalar architectures strongly depend on an instruction issue queue to achieve multiple instruction issue and out-of-order execution.

Superscalar dynamically issues multiple instructions and VLIW statically issues multiple instructions at each cycle.

These processors differ from superscalar processors, which can issue multiple instructions per cycle from one instruction stream (thread); in contrast, a multicore processor can issue multiple instructions per cycle from multiple instruction streams.

A Hybrid System is a combination of single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) systems processing at the same time.

Current microprocessors utilise the instruction-level parallelism by a deep processor pipeline and the superscalar instruction issue technique.

Each core in a multicore processor can potentially be superscalar as well that is, on every cycle, each core can issue multiple instructions from one instruction stream.

On the other hand, Superscalar and VLIW approaches improve the performance by issuing multiple instructions per cycle.

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To satisfy these requirements for performance, efficient instruction set design is one of the important issues because an instruction customized for specific applications can make better performance than multiple instructions in aspect of fast execution time, decrease of code size, and low power consumption.

Modern instruction-level parallel (ILP) processors use superscalar architectures with deep pipelines in order to execute multiple instructions per cycle.

State-of-the-art processors achieve high performance by executing multiple instructions in parallel.