Exact(2)
We propose HM, a multicore model consisting of a parallel shared-memory machine with hierarchical multi-level caching, and we introduce a multicore-oblivious approach to algorithms and schedulers for HM.
Additionally we derive models that assume different practical constraints from ideal heterogeneous multicore model to offer further insights into how to configure given processing cores for optimal efficiency in performance and energy consumption.
Similar(6)
Adapting the SMP multicore programming model from general-purpose computing has serious scaling and reliability issues as well, as shown by work here at Berkeley.
Further, the WCET verification approach preserves feasibility and scalability when applied to multicore architectural models.
The current architecture representation was driven by the need to accurately model multicore architectures and hardware coprocessors with intercores message-passing communication.
We use the same hardware cost model of multicore chips used by Hill and Marty, but achieve very different and more optimistic performance models.
2009 PGAS Unified Parallel CC (UPC)", Programming Models for Multicore, Lausanne Switzerland, September 7 , 2009
A new system makes hardware models of multicore chips more efficient, easier to design and more reliable.
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