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Programmed data could be retained for 103 s with a memory window of 28 V.
The memory window of the NVRAM device was significantly improved by a NH3 annealing process which changed the p-type GNR to n-type.
These strain-induced BST thin films with the 9-nm thick YSZ layer are provided with a non-volatility and exhibit a memory window of 1.1 V maximum.
Excellent performance and reliability for MLC are demonstrated with large memory window of ∼8.5 V and superior retention characteristics of 7% charge loss for 10 years.
A typical design of the new structure leads to a programming duration of 10 ms and maintains a memory window of 3 V after 10-year data retention.
This modification leads to an effective increase in the read-out conductance ratio of two to three orders magnitude under low voltage operation, associated with a large memory window of ∼5.3 V.
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Inset shows the dependence of the width of memory window on Vgmax.
Memory windows of 1.7 and 3.1 V are observed under small sweeping gate voltages of ±3 and ±5 V, respectively.
Even for small scanning gate voltages of ±6 and ±8 V, comparatively large memory windows of 1.8 and 2.6 V can be observed.
c Change of onset voltages and the amount of memory window for polymer transistor memory.
Figure 6c exhibits the variation of memory window for all the samples at two different annealing temperatures of 1000 and 1100°C.
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