Sentence examples for memory access schemes from inspiring English sources
Here, we compare a suite of memory access schemes via empirical testing and performance modeling.
An alternate FFT has also been proposed in [12], which optimizes FFT's performance via three efficient memory access schemes:(1) shared memory is used when the size of data set is small, (2) coalesced global memory access scheme is employed for large size, and (3) a hierarchical memory access method is to compute large data stream's FFT by combining the FFTs of smaller data with share memory.
In this paper, we use the coalesced global memory access scheme to develop the GPGPU-aided MCWT.
In this way, the proposed method using optimized memory access scheme can properly exploit the new features of memory subsystem of the Kepler GPU.
With the assistance of the coalesced global memory access scheme, MCWT-SG-O needs to access the global memory much less than its counterpart does especially when dealing with large data.
We employed a coalesced GPU global memory access scheme [12], a parallelization scheme of two-dimension GPU thread grid and one-dimension thread block for the first sub-procedure.
When compared to the soft-decision sensing using conventional NAND Flash memory, this concurrent access scheme greatly reduces the number of data transfer operations, only ⌈N b ⌉ bits for both LSB and MSB data, because the data are composed within a memory device.
We used a programmable direct memory access engine and a double-buffering scheme in the data cache to perform the computation and the data transfer in parallel.
User memory access (see section 3.1.5 Accessing User Memory).
Bearing in mind that hardware designs in FPGA technology are generally slower than memory chips, it is feasible to build a memory access scheduler by using a suitable arbitration scheme based on a fast memory controller with AAPs running at slower frequencies.
The architecture employs a novel-addressing scheme that significantly reduces the memory access overhead and makes explicit the data parallelism at a low temporal storage cost.
