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where with being the maximum path delay, and for and zero for all other values.
Based on the modeling report [29 31], the maximum path delay and Doppler shift are summarized in Fig. 21.
In practice, if the subcarrier spacing of an OFDM system is increased, the average spectral efficiency would be reduced when the maximum path delay is constant.
Since the maximum path delay is less than the CP length, N g, we can regard the CP length as the preliminary estimate of CL to avoid the break down of performance owing to an insufficient degree of freedom.
Consequently, under the high mobility condition, in order to mitigate the impact of delay, an effective and simple scheme is to reduce the OFDM symbol duration if the maximum path delay is not large.
Therefore, even with the maximum path delay in the high-speed rail mobile communication environment, the samples of the previous frame will not interfere with the samples of the current frame.
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b Maximum combinational path delay of the proposed DCT implementation.
The FPGA hardware resource utilization and the maximum combinational path delay of two DCT architectures are shown in Fig. 12a, b, respectively.
The Pseudo NMOS based completion sensing approach provides a maximum improvement of 76.92% in critical path delay at supply voltage of 1.2 V and the maximum drop in power dissipation has been observed at a supply voltage of 1.1 V which is 85.60% as compared to C-element based completion sensing approach.
In this section, architecture performance is evaluated based on following parameters: HUE, speed, computing time, output latency, line buffers, complexity of control circuit, number of adders and multipliers, system power consumption, configurable logic block (CLB) slices, critical path delay, memory, and maximum frequency of operation.
Also the 123 MHz maximum frequency is captured from the worst case critical path delay.
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