In addition, there is a matrix multiplication algorithm for this multiplication variant, which running time M n) over two n × n matrices satisfies M n) = o(n).
In addition, there is a matrix multiplication algorithm for this multiplication variant, whose running time M n) over two n × n matrices satisfies M n) = o(n).
The first among these improvements was a technique suggested by Valiant [ 23], who showed that the CFG Parsing problem on a sentence with n words can be solved in a running time which matches the running time of a Boolean Matrix Multiplication of two n × n matrices.
When the problem sustains the standard VMT settings, the running time of the algorithm is Θ(M(|| s||)), where M n) is the running time of the corresponding matrix multiplication algorithm over two n × n matrices.
Using the matrix multiplication algorithm of Chan [ 12], this algorithm runs in O | Σ | n 3 log 3 log n log 2 n time (Section "A matrix multiplication based algorithm for EDDC").
Thus a total number of 512 clock cycles is needed to compute a single 32 by 32 matrix multiplication, which leads to a system throughput of 195.3 KMatrices/s running at 100 MHz.
Nevertheless, it is possible to organize these vector multiplications as parts of square matrix multiplications, and to apply fast matrix multiplication algorithms in order to obtain a sub-linear (amortized) running time for each vector multiplication.
This is the function of matrix multiplication Pc in (26a).
As matrix multiplication variants are essential operations in many computational problems, much work has been done to improve both the theoretical and the practical running times of these operations, including many recent achievements [ 24, 27, 40, 41, 46- 50].
