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The decision is based on change in injected current at various buses following the line fault.
There are several approaches to maintain the grid code requirements in the line fault condition.
This paper proposes a novel high voltage transmission line fault location scheme based on application of support vector regression (SVR).
The article discusses an algorithm for a one-sided, impedance-based (transmission) line fault locator using line topology.
Therefore, modern WECSs are required and designed to the low voltage ride through (LVRT) capability in the line fault condition.
This paper proposes a novel transmission line fault location scheme, combining stationary wavelet transform (SWT), determinant function feature (DFF), support vector machine (SVM) and support vector regression (SVR).
Similar(15)
The on-line fault detection based on parity code is designed to check fault cell.
This method does not need any on-line fault estimation, detection or identification mechanism.
This paper presents an on-line fault inference, diagnosis, and detection strategy for large-scale event-driven controlled systems.
The proposed approach is validated by a simulation study of on-line fault detection for a fed-batch penicillin production.
Described solution decreases fault latency and consequently improves the efficiency of the on-line fault detection mechanism.
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Justyna Jupowicz-Kozak
CEO of Professional Science Editing for Scientists @ prosciediting.com