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The memory stack consisted of Pt top and bottom electrodes and a non-stoichiometric switching layer of TaO x.
Both types of devices in this work exhibited the same E a = 0.38 eV; this was related to the fact that both types of devices had the same capping layer of TaO on the top of the switching layers.
Both TaO/HfO x - and TaO/AlO x -based RRAM structures have the same capping layer of TaO, and the activation energy levels of both types of structures are 0.38 eV.
(b) A HRTEM image showing the stacking layer of TaO x and TiO x. Figure 2 exhibits self-compliance bipolar current-voltage (I-V) and corresponding resistance-voltage (R-V) characteristics of the W/TaO x /TiN RRAM devices.
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Ninomiya et al. [38] reported an Ir/Ta2O5−δ/TaO x /TaN structure, and Lee et al. [5] reported a Pt/Ta2O5−x/TaO2−x/Pt crossbar structure with two layers of TaO x and at least one of the inert electrodes such as Ru, Ir, and Pt.
The total thickness of TaO x layer is 30 nm.
The thickness of TaO x layer is 6.8 nm (Figure 5b).
The depth from 50 to 57 nm is the thickness of TaO x layer, which is approximately 7 nm, as shown in Figure 2a,c.
However, the dielectric properties of the structures strongly depend on the thickness of the oxide, dox, because of the influence of a sub-stoichiometric oxide of TaO in thin layers, in agreement with previous results obtained by XPS measurements.
Therefore, thickness optimization is very important and we have chosen those thicknesses of TaO x and TiO x layers here.
The thicknesses of TaO x and TiO x N y layers are approximately 7 and 3 nm, respectively.
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