Sentence examples for interconnect line from inspiring English sources

As the indentation proceeds, an interfacial crack between the interconnect line and the substrate develops if the interface is weak.

In theMicrowedgeIndentationTest (MWIT), a symmetric wedge-shaped probe extends fully across a wide thin film interconnect line, so that analysis under the assumption of plane strain is appropriate.

We have simulated our design using CMOS 90-nm technology at 1.0 V power supply, to transmit signal along a 10-mm interconnect line.

We describe a two-dimensional model to simulate EM-induced stress in a confined bamboo interconnect line with randomly distributed grain sizes.

This equation was discretized by finite differences on a regular grid in space and a Runge Kutta integration scheme in time, and solved simultaneously with a second-order static elliptic PDE describing the electric potential distribution throughout the interconnect line.

In order to illustrate a practical application of our approach, we first revisit the empirical closed-form characteristic impedance expression for the microstrip-like interconnect line with a ground plane aperture.

A major side effect of power dissipation on interconnect lines is an increase in interconnect temperature.

Voids and cracks often occur in the interconnect lines of microelectronic devices.

We illustrate these ideas with elementary examples involving blanket films and isolated interconnect lines.

This architecture is especially suitable for tolerating soft errors in functional cells or on interconnect lines.

A simple theoretical analysis for curvature evolution in unpassivated and passivated copper interconnect lines on a silicon substrate is proposed.