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The first part of this paper deals with the standard etching techniques (Secco, Schimmel, Wright etch…) used for defects delineation in Si, SiGe, Ge and in new engineered substrates made from these starting materials, such as Silicon-on-Insulator (SOI), strained and extra-strained Silicon-on-Insulator (sSOI and XsSOI) and Ge-on-Insulator (GeOI).
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