Sentence examples for improved device efficiency from inspiring English sources

The resultant PeSC with a planar configuration of glass/ITO/RGO/CH3NH3PbI3/PC61BM/bathocuproine (BCP /Ag exhibits improved device efficiency (maximum PCE of 10.8%) with high reproducibility than those of the reference devices using conventional PEDOT PSS and GO HTMs.

The improved device efficiency under the optimal condition was confirmed by the higher light harvest in UV vis spectra, the enhanced quenching of photoluminescence (PL) emission, and the increase in external quantum efficiency.

The improved device efficiency was attributed to the generation of holes which could reduce the charge injection barriers at organic semiconductor interfaces upon application of an electric field.

For BBTI-2, the DIO additive clearly prevents the coarse phase separation (hence the improved device efficiency of 6.0%), although the blend morphology judged from AFM still looks quite different from the higher performing BBTI-1 devices.

So, the suitable modification on TBF and selection of ETLs were valid methods to improve device efficiency.

Therefore, apart from improving device efficiency, it may be preferable to have a range of particle sizes in the respirable range (<5 µm), rather than predominantly small particles, as this will be likely to favour deposition both centrally and peripherally, and minimize systemic absorption.

Modifications to the structure of the dye sensitizer in particular have been found to be the most widely applied method to improve device efficiencies.

In recent years, photoelectric devices have been widely investigated [1, 2, 3], especially detectors with different morphologies and sizes, for exploring their mechanisms, simplifying their syntheses, and improving device efficiencies [4, 5, 6, 7, 8, 9, 10].

Remarkable optical and electrical properties of NC-FeSi2, employed in the proposed structure, facilitate improving device quantum efficiency spectrum providing significant spectrum extension into the near-infrared region beyond Si bandgap.

To address these problems, we have previously reported five stacks of C60/LiF CBL, which substantially improved the device efficiency and stability of PSCs due to its good electrical conductivity even though a very thick LiF was used [26].

Furthermore, thermal treatments can be used to alleviate parasitic series resistance in the GNP devices, thus improving device JSC and efficiency.