Sentence examples for implementation described in the from inspiring English sources
n-ary relationships can be realized in a straightforward fashion mirroring the logical implementation described in the Section [5.5].
In this section, we present experimental results obtained from running the DGRP implementation described in the previous section.
One implementation described in the patent features an Apple logo like the one found on the lid of MacBooks, except composed entirely of microperforations so that it vanishes completely when the computer is asleep or shut down.
A possible instantiation of the abstract function deliverOrder is depicted in Figure 8, where some components of implementation described in the service guidelines, like the attribute names and workflows, are now specified in a computer-interpretable manner.
Our linking implementation described in the "Linking Stack Overflow threads with API elements" section relies on the approaches of Parnin et al. [8] and Linares-Vásquez et al. [13].
In order to discuss the advantages and shortcomings of our interface, we compare the reference implementation described in the preceding section to similar software applications.
Using the Monte Carlo method with the importance sampling implementation described in this section, the calculation of the reflectances in Eq. (7) converge two to three orders of magnitude faster with the number of samples N than the standard Monte Carlo method used in MCML.
The implementation described in this paper, with the intermediate pool variable, costs O(1) time per expert per trial.
The implementation described in this section represents the baseline version of HPG-Methyl that will be used later as a reference.
Each tool then processes the formula and the trace using its own algorithm (the classical LTL evaluation algorithm for BeepBeep, and the MapReduce implementation described in this paper for the others).
The implementation described in this section was developed to enable the run of the numerical solver on distributed memory architectures such as cluster of (multicore) CPUs.
