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MIMOLA Software System 1 (MSS1) and MSS2 high-level syntheses are among the first approaches to high-level synthesis.
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In this talk we give an introduction to FPGAs and modern high-level synthesis (HLS) tools.
The paper, "Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning" is authored by Steve Dai, Yuan Zhou, Hang Zhang, Ecenur Ustun, Evangeline F.Y. Young and Zhiru Zhang.
In 2006, he co-founded AutoESL Design Technologies, Inc. based on his dissertation research on high-level synthesis (HLS).
An enabling technology for ESL design is high-level synthesis (HLS), also known as behavioral synthesis.
Many tools exist for RTL (Register Transfer Level) design, but few for high-level synthesis.
It bridges the gap between high-level synthesis and physical design automation.
A new framework for high-level synthesis of analog and mixed-signal integrated systems is introduced.
Using high-level synthesis allows efficient reuse of resources for self-checking.
Steve recently joined NVIDIA Research as a Research Scientist, after successfully defending his PhD thesis titled "Coordinated Static and Dynamic Scheduling for High-Quality High-Level Synthesis".
recent publications focus on the topics of high-level synthesis, accelerator architectures, programming for FPGAs, and algorithm-hardware co-design for machine learning.
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