A digital architecture suitable for hardware implementation of the distortion correction technique is developed by mapping the algorithmic steps onto a linear array of processing modules.
In the limit of an infinite number of antennas, intra-cell interference and uncorrelated noise can be averaged out by using simple coherent precoders and detectors, and the main performance limitations are pilot contamination and the distortions from hardware impairments [8, 11].
In practice, the power amplification procedure at the transmitter end will inevitably introduce the nonlinear distortion due to hardware imperfections.
However, MR images are inherently subjected to geometric distortions because of hardware design limitations that result in failure such as inhomogeneity of the static magnetic field and non-linearity of the gradients fields [2,3].
The advantage of this method is its capability to estimate transmitted symbols sequentially and timely without a training sequence, even in the presence of nonlinear distortions due to hardware imperfections.
In cases where unknown waveform distortion is likely in hardware, it is possible to implement automated feedback mechanisms, as has previously been demonstrated in dynamical decoupling experiments [15].
Additionally, the audio is often significantly corrupted by wind noise, which is not only additive, but also commonly saturates the recording hardware, leading to clipped waveforms and significant distortions of the speech signal.
In addition, the distortions stemming from both transmitters and receivers cause hardware impairments (HWIs).
Distortions in modern communication systems arise due to hardware imperfections or inherent properties of the channel, e.g., fading.
In addition, an image warping process must remove distortions and correct potential mis-alignments of the hardware.
