Graph aggregation is the process of computing a single output graph that constitutes a good compromise between several input graphs, each provided by a different source.
We propose a general model for applications defined as data-flow graphs of computing tasks, and target execution architectures that are dynamically partially reconfigurable Field Programmable Gate Arrays (FPGAs).
However, it takes O((vert Vvert ^{2}+vert Vvert vert Evert )) time (where V and E are, respectively, the sets of nodes and edges of a network graph) to compute the BWC of just a single node.
After graph edges are added, the final step consists of computing connected components in the graph.
Recently, Palla et al. proposed a graph based clustering method that is capable of computing overlapping clusters [ 11, 17, 18].
The more recent IsoRankN uses a different method of spectral clustering on the multiple alignment graph to compute a global alignment of multiple PPI networks.
Having computed the closure we can construct now a consolidation graph G. Its nodes are all multigenes obtained during the process of computing the closure.
As the BWC for a node u is defined as the sum of the fraction of shortest paths between any two nodes i and j ((i ne j ne u)) that go through node u, one would have to run the shortest path algorithm on every node in the graph to compute the BWC of even a single node.
Notable among them are graph traversal, finding the connected components of a graph, and computing shortest paths.
