Sentence examples for fault tolerant design from inspiring English sources
The outcomes imply an outstanding feature of fault tolerance in this system with 100% fault coverage, which paves the way for bio-inspired approaches to fault tolerant design instead of the classic ones.
The data center houses several servers, which are built with fault tolerant design and can currently store over 14 terabytes of imaging data.
The TriMorph architecture is a good testbench for a variety of ideas in the fields of video processing, dynamic testing or fault tolerant design.
A modular and fault tolerant design helps AEGIS achieve scalability and robustness, while a distributed storage model with local autonomy helps to minimize risk of unauthorized disclosure.
The comparison between the availability results has been a milestone not only to evaluate the major unavailability contributors in the updates but also to implement fault tolerant design strategies when possible.
In the literature solutions for fault tolerant design, that can address MTF and MCT simultaneously during high level synthesis (HLS) for both loop based and non-loop based applications, does not exist.
A comparative analysis of the proposed fault tolerant designs in terms of hardware complexity, latency, power consumption and error detecting and correcting capability is conducted.
The technique introduced in this paper is a new technique for analyzing fault tolerant designs under considerable uncertainty, such as seen in unique or few-of-a-kind devices in poorly known environments or pre-prototype design analyses.
Reliability is increased by using hardware redundancy, and three LCDMA-based fault tolerant designs are proposed: (a) duplication with logic comparison (DLC), (b) conventional triple modular redundancy (TMR), and (c) triple modular redundancy with sign voter (TSV).
There are many different fault-tolerant design schemes.
The paper also presents some hardware implement methods about fault-tolerant design of data decode and test methods about fault-tolerant design of USB2.0 IP core system.
