Sentence examples for exploitation of memory from inspiring English sources

In this work, we discuss how extrinsic vectorization may be unified with shell structure through the exploitation of memory access locality.

A simulator that takes into account memory reference locality issues is proposed, showing that the challenge of achieving a high performance depends strongly on the explicit exploitation of memory hierarchy.

At first, we assume that the source-relay correlation is not exploited and only focus on the exploitation of source memory.

This method reduces the number of points of global synchronization allowing efficient exploitation of the memory hierarchy of the GPU.

Such systems have been observed at the level of whole organizations, suggesting that they provide a means for conceptualizing the exploitation of organizational memory.

Recently, exploitation of the memory structure inherent within the source using serial concatenated convolutional codes has been proposed in [11], which demonstrates superiority in BER performance without requiring heavy decoding complexity.

The objective was to achieve significant acceleration and energy efficiencies for collision detection through the effective exploitation of parallelism and memory bandwidth.

When the exploitation of the source memory having more generic structures, the problem of code design for relay systems exploiting jointly the source-relay correlation and the source memory structure is still open.

These two principles aim at reducing the amount of rules contemporarily present in the main memory at any given instant of time, allowing for an effective exploitation of the in-memory computing platform.

Schulze resists the temptation to seduce us with the joys and betrayals of the period, as if that would be yet another form of exploitation, but the resulting epistolary jumble of memory and event is inevitably less resonant for an American audience than for a German one.

The optimizations proposed are DSP specific and address four of the most appealing features of the architecture: instruction, data, and thread parallelism extraction, and the exploitation of the flexibility of the memory hierarchy, plus the usage of DMA to overlap computation and communication.