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Furthermore, we exploit hardware and software vectorization to compute closeness centrality values on CPUs, GPUs and Intel Xeon Phi.
Other attacks that exploit hardware issues or hypercall-handling flaws are harder to perform as they require certain administrator privileges or additional staging steps.
To provide rapid decoding speed in practical network coding systems, various multi-threaded approaches which successfully exploit hardware supported TLP have been proposed.
Although limitations at the processing level can make them target mainly low-throughput applications, they can exploit hardware simplifications, such as reducing the storage size of messages and still achieve coding gains without noticeable loss in performance [26].
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Consequently, computation times of RAP-IE and RAP-AllApps can be reduced by exploiting hardware parallelism.
The system can sense and manage faults on the hardware and prevent software from exploiting hardware holes.
Moreover, we develop in this paper a new data-driven fault isolation scheme, via exploiting hardware redundancy in a plant.
Special-purpose hardware computes the answer to the problem quickly by exploiting hardware design techniques such as pipelining, the replication of small computation units, and high-bandwidth local memories.
Moreover, thanks to the AMBER modularity, higher scalability levels can be reached by considering Extenders embedding additional microprocessors or microcontrollers, thus exploiting hardware and software Asymmetric Multi-Processor (AMP) solutions [38].
Beyond the massively parallelized and distributed approaches exploiting hardware architectures and programming frameworks that have received increasing interest these last few years, several variants of the Stochastic Gradient Descent (SGD) method based on "smart" sampling procedures have been designed for accelerating the model fitting stage.
In this paper, the L2 anti-windup approach introduced in Teel and Kapoor (Proceedings of the Fourth ECC, Brussels, Belgium, July 1997) is generalized and applied to the problem of bumpless transfer in (saturated) multi-controller systems, and to the problem of designing highly reliable saturated control systems exploiting hardware redundancy.
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