Processors have evolved into two main categories, namely, in-order execution and out-of-order execution.
Deep pipelines, multiple execution units, out-of-order and speculative execution techniques, typically found in such microprocessors, contribute much to this complexity.
To address this problem, we present a technique called speculative plan execution, an out-of-order method that capitalizes on knowledge gained from prior executions as a means for overcoming remaining data dependencies between plan operators.
One of the critical changes is the employment of in-order execution instead of out-of-order execution.
Dynamically scheduled, superscalar microprocessors combine several parallel execution units with an out-of-order execution to extract the ILP from the instruction stream.
It allows sequential instructions that would normally be stalled due to certain dependencies to execute non-sequentially (out-of-order execution).
Classic enhancements in computer architectures are pipelining, instruction and data caching, dynamic branch prediction, out-of-order execution, speculative execution, and fine-grained chip multithreading.
The poem "Green Leaves, Falling," dedicated to "the young political prisoners awaiting execution," laments the "out of season" chill wind that has cut short "youthful dreams".
In a processor that supports out-of-order execution, the execute stage can process instructions in a different order than was specified by the executable and can dynamically reorder instruction execution based upon resolution of dependencies.
More precisely, it executes the instructions serially as in-order execution until a stall condition is encountered, and thereafter, it uses of concept of out-of-order execution to replace the stall with an independent instruction.
