Suggestions(1)
Exact(5)
This results in lower erase voltage and much shorter erase times.
This indicates the reduced memory window as the erase voltage is increased.
c The device shows program/erase endurance by external light illumination of 10 s and negative erase voltage.
This erase saturation makes SONOS erase less as the erase voltage or the tunnel oxide thickness is increased.
In fact, in the proposed structure the erase voltage is about 20% lower and the erase current three thousands times greater than in conventional MOS with pure-SiO2 tunnel oxide and the same equivalent oxide thickness (15 nm).
Similar(55)
The program and erase voltages were +3.5 and -2.5 V, respectively, as shown schematically in the inset of Figure 9a.
In 2009, Sekitani et al. [45] developed a low power operating flexible floating gate transistor memory using self-assembled molecular gate insulators, which enabled very small program and erase voltages of –6 to +3 V.
In addition, as the erasing voltage increases from −12 to −15 V, the ΔV th increases from −0.5 to −1.9 V in the case of 200 ms erasing time, as shown in Fig. 8b.
On the contrary, as the erasing voltage changes from -8 to -12 V, the resulting C-V curve moves gradually in the direction of negative bias, see Figure 9b.
The programming and erasing voltages are 1.25 and −1.0 V, respectively.
The programming and erasing voltages were set to +1.1 and −1.0 V, respectively, and the read voltage was 50 mV.
Write better and faster with AI suggestions while staying true to your unique style.
Since I tried Ludwig back in 2017, I have been constantly using it in both editing and translation. Ever since, I suggest it to my translators at ProSciEditing.

Justyna Jupowicz-Kozak
CEO of Professional Science Editing for Scientists @ prosciediting.com