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We outline underlying design approaches for mapping an ANN model onto a compact, reliable, and energy efficient hardware entailing computation and communication and survey a wide range of illustrative examples.
Wireless sensor networks (WSNs) demand low power and energy efficient hardware and software.
Software based techniques have helped in reducing energy needs with source code which is to be executed at some CPU which ultimately needs energy efficient hardware.
This is all despite the severe demands such actions can put on the whole body's physiology, and despite being implemented in highly energy efficient hardware that has distributed, sparse, quantized, noisy, delayed, and saturating sensing, communications, computing, and actuation.
The laptop was rated poorly by reviewers as it under-performed and had mediocre battery life, despite the installed energy efficient hardware.
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Adiabatic logic is one of the circuit design techniques for designing energy-efficient hardware.
The former area includes researchers developing massively-parallel processors, energy-efficient hardware systems, distributed computing, software and databases, but also, in a broader view, those studying the brain.
In the past decade, we have witnessed the significant progress toward developing more energy-efficient hardware and facility infrastructure.
Applications, even those which do not saturate the large vector processing unit in each core, may benefit from the energy-efficient hardware and software of the Xeon Phi.
The power wall asks for a holistic effort from the high performance and scientific communities to develop power-aware tools and applications which ultimately drive the design of energy-efficient hardware.
Although more energy-efficient hardware can be designed, it is software that controls the hardware; for a given system the potential for energy savings is likely to be much greater at the higher levels of abstraction in the system stack.
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