Field Programmable Gate Arrays (FPGAs) are a form of programmable digital hardware configured to perform digital logic functions.
Established consumer electronics companies have well-funded processes for bringing new digital hardware products to market.
The arrays are coupled with digital hardware including time-to-digital converters (TDCs) capable of resolutions better than 25 ps and recharge periods shorter than 7.5 ns.
In recent years, neuromorphic hardware systems have been implemented using a hybrid approach incorporating digital hardware so as to provide flexibility and scalability at the cost of power efficiency and some biological realism.
Then, digital hardware synths began to be replaced by software versions, which essentially performed the same calculations but came in at a much cheaper price.
Digital hardware products are expensive to design, prototype, redesign, productize, scale production and then support.
This suggests that controllers implementing dynamic error suppression protocols (here producing noise filters for arbitrary driven operations) should be reasonably simple to implement in standard digital hardware and should require only limited communication bandwidth to higher levels of the system.
Today, digital hardware has become powerful enough to perform the massive number of operations required for real-time digital beamforming.
Plus, cloud-connected and artificial intelligence (AI) based services linked to local digital hardware are making embedded software design even more challenging for the Internet of Things (IoT) and other classes of consumer electronics products.
After discussing the mapping of SOMs to the reconfigurable digital hardware implementation, we present how the modular system architecture can be flexibly adapted to various application datasets as well as to variants of SOMs like Conscience SOM.
