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For the fabrication of nano-submicron-stripe dual-beam sensors, the device patterns were created with standard electron-beam lithography (EBL) processes on a Raith 150-II system at an operation voltage of 20 kV, an aperture dimension of 20 μm, a step size of 8 nm, and a writing field of 100 μm.
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The device pattern was transferred on the substrate by ICP etching.
Final device pattern was obtained after standard lift-off process in pure acetone.
Oxidation Scanning Probe Lithography (o-SPL) is an established method employed for device patterning at the nanometer scale.
This is because the complete elimination of the lower-sided adhesive layer can reduce the thermal-cycling induced stress level on the device pattern.
The latter approach has the advantage of avoiding the defects generated during the post treatment methods, and may also be combined with other growth controls such as structure selectivity of SWCNTs and direct device patterning for scale up applications.
Multiwalled carbon nanotubes (CNTs) have a large surface area and have been extensively studied for a variety of purposes, such as sensors, fuel cells, and device patterning [ 4, 5].
These were ideal theatre clothes, for they identified the characters, allowed complete freedom for movement and acrobatic dancing, and charmed the spectator with their amusing devices, patterns, and colour motifs.
These δ-layers are fabricated using identical processes to atomic-scale devices patterned by scanning-tunnelling lithography [17].
To increase the light extraction efficiency in GaN based optoelectronic devices, patterned substrate [29 32], roughening and patterning the GaN surface with photonic crystal structures [33 35] were used.
The spread in properties among devices patterned on the same SiC/G wafer can thus be understood by considering the inhomogeneous number of layers often grown on the surface of epitaxial graphene on SiC.
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