Sentence examples for data width of from inspiring English sources

In most cases, ALU operands and results are with native data width (the data width of register and memory bus).

While the wider data width of eDRAM does reduce the burst transfer time, the actual reduction in the total stall cycles when the width was expanded from 8 to 16 bytes was lower than expected, ranging from 6.2% to 18.9%.

By default, it has an input data width of 64 bits and an output data width of 128 bits with a 256-word depth.

The authors have chosen the polynomial p=x 16+x 15+x 2+1, default "CRC-16/USB Date" data width of 64 bits, and Verilog language.

The highest data width found for the complex data is 32, whereas most designs have used a data width of 16/20/22 bits.

However, if the quotient leaves a remainder when dividing by four then a modulus function can be applied to determine the data width of the last FSL channel.

By default, the data width is of 128 bits and the FIFO depth is of 256 words.

The first one being how many FSL channels need to be instantiated per each level of accelerator scaling, and secondly what the data-width of each channel needs to be.

Nonetheless, the potential for ease of automated configuration is high due to the fact that the FSL lanes can be scaled according to the number of input and output ports that are required by the accelerator, and by the fact that the data-width of each port can be set accordingly as well.

Furthermore, should the underlying physical SATA-core be changed to support future SATA-3 generation devices or merely wider data-widths of the transceivers used even within SATA-2 devices, these changes can be supported by software.

Formally, given input signals x1,......,x S with data width W, the output of switch network has the form x a 1, x a 2,..., x a S where a 1,a 2,a..,a S is any desired permutation of 1,2,...,S.