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In most cases, ALU operands and results are with native data width (the data width of register and memory bus).
The highest data width found for the complex data is 32, whereas most designs have used a data width of 16/20/22 bits.
By default, it has an input data width of 64 bits and an output data width of 128 bits with a 256-word depth.
Data width naturally grows with processing, this is a major question in fixed-point ASIP applications.
(4 The User S/W Regitser data width should be 32.
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Hence, quantized computational parameters may have different data widths.
Finally, the highly scalable nature of the proposed architecture supports high-speed computations of larger data widths.
An important advantage of XSG is that it allows for quick evaluation of system response when making changes (e.g., changing coefficient and data widths).
Our approach uses 4 bits data widths to represent the fractional part which requires only six shift operations, seven additions/subtractions and four comparisons.
Unfortunately, data-width timing issues over the operation's latency have not been taken into account accurately.
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