Sentence examples for clock samples from inspiring English sources

This clock signal must be at least two times slower than the free-running clock because the free-running clock samples this signal.

Based on this platform, we present a 128-channel TDC which is implemented in a single Xilinx Virtex-5 FPGA using a shifted clock sampling method.

It illustrates a generic block diagram of an SCF-based sampled-data filtering system in which the analog input signal is preprocessed by an anti-aliasing filter (AAF) to eliminate the unwanted signals located beyond half the clock sampling frequency.

To reduce the clock jitter, one clock is used to generate the clock sampling signal.

Furthermore, FIR filter can transfer IF signal to baseband by using the decimated clock sampling signal.

In addition, the information signal can be recovery from the demodulated signal by using the clock sampling signal.

Therefore, the clock generation is needed to provide the high clock sampling frequency, which increases the power consumption of the subsampling receiver.

It can achieve −85 dBm sensitivity for an amplitude shift keying (ASK) modulation at the data rate of 1 Mbps with the clock sampling frequency of 40 MHz.

A clock generator can provide local sampling signal, which can be translated to the clock sampling signal by two frequency dividers and the decimated sampling signal by D flip-flop.

For the application of IoT, the clock sampling frequency of 40 MHz can be used with the sampling ratio of 20, based on the analysis of the sampling frequency.

If input signal frequency of 780.5 MHz is sampled by the clock sampling frequency of 40 MHz and input signal power level is −85 dBm, the output intermediate frequency is 500 KHz.