Sentence examples for by the master processor from inspiring English sources

The evolutionary processes, such as crossover, mutation and production are performed by the master processor.

The text marked as SLAVE, PROCESSOR j corresponds to the code implemented in parallel by each of the slave processors; the rest of the computations are carried out by the master processor.

The proposed approach allows to bound communication memories for different loading rates of the master processor.

The master processor uses a single population as a simple genetic algorithm does, and distributes the tasks of fitness evaluation to slave processors.

In a genetic driver, there are typically architecture-specific portions of source code, because the master processor is the central control unit and to gain access to anything on the board usually means going through the master processor.

A device driver that is architecture-specific manages the hardware that is integrated into the master processor.

Each task of the DFG is characterized by the following four parameters: (a) Texe (execution time),   (b) Impl (implementation on the RCU or on the master processor or on the slave processor),   (c) Nbpred (number of predecessor tasks),   (d) The Nbsucc (number of successor tasks).  .

Texe (execution time), Impl (implementation on the RCU or on the master processor or on the slave processor), Nbpred (number of predecessor tasks), The Nbsucc (number of successor tasks).

For each task there can be up to three different implementations: Hardware implementations (HW) placed in the FPGA, Software implementations running on the master processor (MS), and another Software implementation running on the slave processor (SL).

It is comprised of a set of library routines and compiler directives that allow the master processor to distribute the data and tasks among the processing units.

Specifically, this can include drivers for the master processor architecture-specific functionality, memory and memory management drivers, bus initialization and transaction drivers, and I/O initialization and control drivers both at the board and master CPU level.