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The identification of the factors was possible by optimizing the architecture and weights of the network.
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The cost and power consumption of the proposed AES coprocessor are reduced considerably by optimizing the architectures of SubBytes/InvSubBytes and MixColumns/InvMixColumns, integrating the encryption and decryption procedures together by the method of resource sharing, and using the hierarchical power management strategy based on finite state machine (FSM) and clock gating (CG) technologies.
By optimizing the microfluidic architecture, e.g. the microchannel dimensions and the diffusion layer stack, we demonstrate of the smallest, highest performance μFCs reported to date.
The present work improves on an existing model by optimizing the model architecture along with the key learning variables of the ANN and by making the model more generalizable to a wider variety of fuel candidate types, specifically the class of furans and furan derivatives, by including specific molecules for the model to incorporate.
These fields reach from the detection of irregularities in data (e.g. economic fraud) to optimizing the architecture of computers regarding number representation, storage, and round-off errors.
This has been obtained by optimizing the process and device architecture.
We mainly focused on improving the output performance of TENG by optimizing the structural dimensions of nanopillar architectures (NpAs) distributed on the surface of PDMS.
Notably, the computing time can be reduced by optimizing the program codes and designing special computer architectures for implementing the proposed scheme.
The work of Li is a cognitive interference management scheme for a cognitive femtocell network architecture that chooses its transmission schedule by optimizing the channel assignment and power control.
This problem was solved by optimizing the synthesis of ZnO.
These parameters have been estimated by optimizing the prediction process.
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