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A Cr layer that functioned as a buffer layer is deposited between the alloy film and die surface.
A 12 nm thin GaAs buffer layer is deposited followed by a small annealing step for 20 s in order to reduce surface roughness created during etching.
When an aluminum buffer layer is deposited on electrically conductive carbon paper, high yield CNTs can be achieved while no CNTs can be observed without this buffer layer.
In addition, although a buffer layer is deposited on the Si nanostructure, a reflection occurs at the surface of the buffer layer because of the difference in n between air and the PDMS buffer layer (see the small step in Figure 5c).
Then the template is transferred into the growth chamber and cleaned at the temperature of 800°C for 60 min. A 140-nm-thick buffer layer is deposited at the temperature of 700°C, and a 200-nm high-temperature GaN layer is then grown at the temperature of 780°C.
After nitrifying HfO2 substrate at the temperature of 680°C for 20 min, a 150-nm thick buffer layer is deposited at a temperature of 680°C, and a 450-nm high-temperature GaN layer is then grown at the temperature of 750°C.
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Then, a 10-nm thick Al2O3 buffer layer was deposited by atomic layer deposition.
After oxide removal, a GaAs buffer layer was deposited to obtain a flat surface.
Then a 50 nm thick Si buffer layer was deposited at 650°C with a growth rate of 0.36 Å/s.
After oxide desorption, a 300-nm GaAs buffer layer was deposited on the semi-insulating GaAs (100) wafers at 580°C.
First, a 64-nm-thick Si buffer layer was deposited on the wafer at 640°C, followed by a 2.5-nm-thick Ge layer depositing at the same temperature.
More suggestions(17)
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