Polymer solar cells with the blend of P1 and PC71BM as the active layer without the additive or annealing showed a PCE of 4.72%, which was higher than P2 based devices with a PCE of 1.65%.
Obviously, P1 can endow devices with a Voc of 0.77 V and a Jsc of 10.75 mA cm−2, which are higher than that of P2 based devices with a Voc of 0.75 V and a Jsc of 4.41 mA cm−2, such an enhanced photovoltaic performance can be attributed to the broader absorption, the improvement of film morphology, and the higher charge mobility.
So there should be a possibility of substituting some graphene based devices with this a-Gs having further advantage of its simple synthesis procedure as well as gram level higher yield.
Device efficiencies up to 6.4% are achieved with this design, which are the highest efficiencies for P3HT based devices with calamitic NFAs, suggesting that this is an effective design strategy.
The study should be useful in designing various fiber optic multimode interference based devices with high or low temperature sensitivities.
The temperature of the Si clean surface preparation, the final high-temperature step of which is, as a rule, carried out directly in the MBE chamber just before the structure deposition, determines the compatibility of formation process of Ge-QD-array Ge-QD-array Ge-QD-arrayCMOS manufacturing cycle.
SiGe/Si HBT is a novel Si based device, compared with traditional BJT, SiGe/Si HBT has some advantages including high current gain, excellent frequency property and lower noise, energy band engineering and doping engineering introduced bring design freedoms.
The maximum power conversion efficiency (PCE) of Th-C60 based device reaches 0.79% with a short-circuit current density (Jsc) of 2.65 mA/cm2, Voc of 0.49 V, and fill factor (FF) of 60.5%.
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Figure 5b shows typical consecutive I-V switching curves for 100 cycles together with the formation curve at a positive voltage obtained for the AlOx-based device with a via-hole structure.
