The plot compares the parallelized and new implemented code in the affyPara package running on one processor to the execution time on two to twenty processors.
We use the parallel Lam Simulated Annealing (pLSA) algorithm developed by Chu et al. [ 27], running on K processors with one processor being arbitrarily defined as the master node.
The structure should enable the processors to work in concurrent mode as far as it is possible and minimise the situations, when one processor has to wait for the other.
The structure should enable the processors to work in concurrent mode as far as it is possible, and minimize the situations, when one processor has to wait for the other.
However, in this study, only one processor was used as sequential algorithm was implemented for extracting feature values.
All the timing experiments reported were performed on the bi-processor, using one processor per run.
The speed-up, defined as the clock time for a run with one processor divided by the clock time for the same run on multiple processors, is shown in Figure 10(A).
If you're using one processor with two cores, Oracle treats it as a single processor.
The simulation speed is 4.3 GHz as opposed to 670 MHz for the previously fastest reported implementation using one processor of a Cray-XMP.
