Exact(8)
The words "aggressive scaling" come to mind.
Semiconductor technology is undergoing a continuously increasing advancement in the aggressive scaling of device length [1].
With the aggressive scaling of the VLSI technology, Networks-on-Chip (NoCs) are becoming more susceptible to faults.
In addition, the time-independent process-induced variation has also increased because of the aggressive scaling down of devices.
With aggressive scaling of CMOS technologies, MOSFET devices are subject to increasing amounts of independent local statistical variability.
Aggressive scaling of the CMOS process technology allows the fabrication of highly integrated chips, and enables the design of the network-on-chip (NoC).
The tremendous growth of the semiconductor industry in the past few decades is fueled by the aggressive scaling of the semiconductor technology following Moore's law.
In the sub-50-nm scale, the aggressive scaling of MOSFETs is expected to culminate in dual-gate (DG) architectures on SOI substrates.
Related(1)
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