Sentence examples for a voltage error from inspiring English sources

Exact(2)

This implied a voltage error of >15 mV.

Slower Vm changes induced CaV currents with a lag (τ = RseriesCm, see exemplary trace Figure 3 figure supplement 1B), and Vm becomes larger than the voltage command, introducing a voltage error that scales with the current amplitude (Vm = Vp -−− ImRseries).

Similar(58)

Cells were excluded from analysis if uncompensated series resistance resulted in a maximum voltage error >5 mV or if the seal or access resistance were unstable.

Currents were low-pass filtered at 2 kHz and digitized with sampling rates of 50 kHz using the Digidata 1440A AD/DA converter (Axon Instr).. Patches with a series resistance voltage error greater than 5 mV and those with non-negligible leak current were discarded.

The proposed AFC for APF, consist to adapt the output gain of this controller at every situation of the system as a function of the voltage error and its variation.

The large amplitude of the anoxic depolarization current (up to 6 nA) implies the occurrence of a significant series resistance voltage error, even after compensation.

Second, a source current reference generator is constructed, which consists of a feedforward loop given by steady state analysis and a feedback loop with output voltage error amplifier.

The red dotted indication shows a control loop which generates the voltage error signal of MG1 and MG2 buses.

The feedback gain in the observer is switched by a proposed geometry classifier to categorize the voltage error into different groups so that the observing strategies can be designed for different error sources, and thereby robust and accurate SOC estimations.

Open image in new window Fig. 8 The plasma electron density as a function of applied impulse, a voltage [with error bar from up to down ± 0.25, ± 0.29, ± 0.32, ± 0.27, ± 0.3] and b frequency [with error bar up to down ± 0.22, ± 0.3, ± 0.25, ± 0.28, ± 0.32] at the various percentages of Ar in Ar/N2 mixture.

Neglecting the communication time delay, the control reference of the voltage error of the critical bus is expressed in a discrete way as: Delta u_{0}^{t} = k_{i} cdot intlimits_{s = 0}^{t} {Delta u_{0}^{s} } + k_{p} left( {V_{C}^{t} - V_{ref} } right) (5 where (Delta u_{0}^{t}) is the control reference of the leader at time t.

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