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Two optimization methods are proposed for the reduction of the FDTD simulation time: the reduction of the simulation frequency for problem simplification and a parallel graphics processing units (GPUs) implementation.
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The GT flavor packs 32 parallel graphics cores with 512 MB of video memory all running at 120 Gigaflops for graphic heavy work but the 9400 has your back for mundane daily tasks.
The purpose of this work is to provide a software solution which would enable very fast list-mode data processing offered by the massively parallel graphics processor units (GPU) while dealing efficiently with the common bottleneck of data transfers between hard disk storage, host (CPU) memory and device (GPU) memory.
In this work we accelerate computations of base-pair probababilities using parallel graphics processing units (GPUs).
In addition, considering the parallelization capacity of our method, the system can be redesigned for implementation in parallel graphic hardware.
Since a parallel calculation with graphics processing units (GPUs) showed good speed efficiency in our previous paper (Nakahata & Kimoto 2012), we use the same calculation method in this study and accelerate the FIT simulation.
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