First, the HVDC/AC interconnected systems are linearized into a nominal delay-dependent linear model using varying-delay characteristics.
Finally, a nominal delay-free part of the control input is designed to stabilize the sliding mode dynamics.
We will use the identification properties of the proposed algorithm, stated in Theorem 1, to show that the nominal delay converges to a neighbourhood of the actual matrix delay in finite time and eventually becomes a time-invariant system.
The conclusion is that an observer-free solution is feasible for integrating the two pieces of hardware over the Internet in a transparent manner, even if the nominal delay is increased by four times.
In the simulations, a random Gaussian delay with r.m.s.value of 5% of the nominal delay was added to each cell.
The nominal delay is used within each time interval to generate the control law.
The models are not equally spaced in the delay space since the mesh is more refined near the nominal delay.
First, is to note that the nominal delay used in the MoSP is lower h ˆ 0 nom = 9 seconds in comparison with the initial nominal model used in our approach h ˆ 0 nom = 23 seconds, this was necessary, because if we use a delay of h ˆ 0 nom = 23 seconds in the MoSP, this becomes unstable.
Therefore, Theorem 1 guarantees that the nominal delay converges to the actual matrix delay, and hence, lim t → ∞ H ˆ ( t ) = H implying: lim t → ∞ h ˆ i j ( t ) = h i j, ∀ i j.
The proposed architecture is composed of patterns, which are directions in the search space starting from the nominal delay H ˆ k = ( h ˆ k i j ) ∈ R n × n.
Figure 5 Output signal for channel 1. Figure 6 Output signal for channel 2. The nominal delay matrix at 25 seconds is H ˆ k nom = ( e − 15.5 s e − 3.4 s e − 7.6 s e − 11.8 s ), (25).
